Tech-No!: Verification Methodologies and Design Patterns: Singleton Pattern

Definition/Intent: Ensure a class only has one instance, and provide a global point of access to it. It is a creational pattern.

Participants & Implementation:

Singleton:

– is responsible for creating and storing its own unique instance

– defines an Instance operation that lets clients access its unique instance

The “class level” Instance operation will either return or create and return the sole instance; a “class level” attribute will contain either a default indicating there is no instance yet or the sole instance

Applicability:

– There must be exactly one instance of a class, and it must be accessible to clients from a well-known access point.

– When the sole instance should be extensible by subclassing, and clients should be able to use an extended instance without modifying their code.

Benefits:

– Controlled access to sole instance

– Permits a variable number of instances

Usage in OVM:

· OVM_TOP – instance of ovm_root. Only one instance of ovm_top

· OVM Factory - only one instance of ovm_factory

References:

i. http://sourcemaking.com/

ii. http://www.oodesign.com

iii. http://home.gwu.edu/~blankeng/Classes/CSCI253/Class%20page%20(spring%202007).htm

vi. http://www.dofactory.com/Default.aspx

Tech-No!: Clock Dividers

Here is a good article for Clock Dividers:

"Clock Dividers Made Easy" - (SNUG Boston 2002 paper)

http://www.scribd.com/doc/6868408/Clock-Dividers

"Unusual Clock Dividers" - (Xilinx article)

http://www.nalanda.nitc.ac.in/industry/appnotes/xilinx/documents/xcell/xl33/xl33_30.pdf

Tech-No!: Clock Gating

Here is an article on Clock Gating basics. This is a SNUG2000 article.

"Power Reduction Through RTL Clock Gating"

http://www.eng.auburn.edu/~vagrawal/COURSE/E6270_Fall07/PROJECT/LUO/snug2000.pdf

Tech-No!: Clock Muxing

Here is a good article that talks about various glitch free clock muxing techniques.

"Techniques to make clock switching glitch free"

http://www.eetimes.com/story/OEG20030626S0035

Tech-No!: Verification Methodologies and Design Patterns: A Preview

Ever since I worked on my first project in the industry, a simple Vera based verification environment, I have been thinking about the possible usage of Design Patterns in ASIC/SoC Verification. After all these years, I have managed to get a better understanding of this topic. I have worked on various Verification Methodologies and have identified a few design patterns in these methodologies.

In this series, I will target one design pattern in each post and hope to have a series of articles covering this topic. I will start with the usage of Singleton Pattern in OVM.